The present invention relates generally to programmable devices, and more particularly to systems and methods for detecting configuration errors in programmable devices. Programmable devices typically include thousands of programmable logic elements that are made up of logic gates or look-up tables that can be configured to perform user-defined logic functions. Programmable devices often also include a number of specialized circuits adapted to specific functions, such as adders, multiply and accumulate circuits, phase-locked loops, and memory. These programmable logic elements and specialized circuits can be interconnected using programmable interconnect lines. The programmable interconnect lines selectively route connections among the programmable logic elements and specialized circuits. By configuring the combination of programmable logic elements, specialized circuits, and programmable interconnect lines, a programmable device can be adapted to perform virtually any type of information processing function.
The configuration of a programmable device is typically controlled by configuration data stored in a set of configuration RAM (CRAM) cells or configuration memory. Typically, the data in CRAM cells includes entries for look-up tables, control signals for multiplexers included in programmable logic elements, values that control the programmable interconnect lines, and values that control other aspects of a programmable device, such as modes of operation for the programmable device.
The configuration data is typically stored in a non-volatile memory, such as flash memory or ROM that is within the same chip package as the programmable device or on an external configuration device connected to the programmable memory device. At power-up, reset, or other appropriate conditions, this configuration data is loaded from the flash memory into the CRAM cells of the programmable device to configure the programmable device.
Each new generation of programmable devices are made up of transistors that are smaller than their predecessors due to advances in manufacturing processes. As the physical dimensions of CRAM cells decrease, they become more susceptible to spontaneous “soft errors.” Soft errors may be induced by background radiation, such as alpha particles or cosmic rays, and result in CRAM cells spontaneously changing state from “0” to “1,” or vice versa. Soft errors are so named because erroneous information in a memory cell can be corrected by reprogramming, as opposed to hard errors where a memory cell is permanently nonfunctional. Since the function of a programmable device is determined by data stored in CRAM cells, even a single change in a CRAM cell's state can change or disable the function of the programmable device. Additionally, as programmable devices become more complicated, additional CRAM cells are required to store configuration data. This further increases the frequency of soft errors.
Previous methods to correct soft errors include the use of error detection circuitry that reads configuration data and from CRAM cells and determines the presence of errors. Upon the detection of an error, the error detection circuitry typically raises an error signal that causes the programmable device to reload its configuration data and be reconfigured for correct operation. In another approach, error correction circuitry that can correct known errors is also included on a device. This circuitry can be used to correct configuration data in the CRAM without reloading the entire set of configuration data.
Many applications running on a programmable device do not use large portions of the device's circuitry. For example, a typical application might only use one-half of the included circuitry, meaning only approximately half of the CRAM cells are needed to configure the operation of programmable logic elements, specialized circuits, and programmable interconnect lines that are used by the application. The remaining CRAM cells, which may be set to some known logic value, do not affect the functions of the programmable device. The CRAM cells that control programmable logic elements, specialized circuits, and programmable interconnect lines that are unused by the application are referred to as unused CRAM cells. Soft errors in unused CRAM cells are insignificant and can often be ignored.
Because error detection circuitry does not distinguish between used and unused CRAM cells, programmable devices employing convention techniques generally reload configuration data upon detection of any error in the CRAM cells. However, as large portions of the CRAM may be unused by applications of the programmable device, many of these soft errors are “false positives” that have no effect on the functionality of the programmable device. Thus, programmable devices often unnecessarily reload configuration data due to false positives, which diminishes the performance of the programmable device—due to downtime during the loading of configuration data—and increased power consumption—due to unnecessary loading and storing of configuration data.
Therefore, what are needed are circuits, methods, and apparatus that detect false positive soft errors so as to avoid unnecessary remedial activities such as error correction or device reconfiguration.